Building High Speed Erasure Coding Libraries for ARM and x86 Processors

 Цифровая Передовая
Цифровая Передовая

In this video from the MSST 2017 Mass Storage Conference, Per Simonsen from Memoscale presents: Building High Speed Erasure Coding Libraries for ARM and x86 Processors. "Library optimizations as well as development of new erasure coding algorithms have been keys to unlocking higher levels of erasure coding performance. Learn about performance improvements achieved on ARM and x86 processors." Learn more: http://storageconference.us/ Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter


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